Training

Vertech’s seminars are built in a way the engineer participating has the opportunity of building up his knowledge on a layer by layer approach. Vertech seminars are delivered on costumer site and adjusted to costumer needs.

 

Advanced VHDL course
(2 days)

Layout design interface
(1 day)

Functional verification
(2 days)

Layout design interface
(1 day)

Signal integirity basics
(2 days)

Digital design with multiple clock domains semina r
(1/2 days)

Alogrithithm design with hardware seminar
(1/2 days)
 
 
 
 
 
 
 
 

 

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